Job Description
GENERAL INFORMATION
§ Position: JAPANESE SPEAKING – HARDWARE DESIGN ENGINEER (VHDL/ VERILOG)
§ Job code: JO-180115-144851
§ Level: Staff
§ Headcount: 2
§ Contract Term: Permanent
§ Recruitment Reason: Expansion
§ Expected joining date: ASAP
§ Work Location: District 3, HCMC
§ Work Time:
- Monday-Friday (9:00~18:00)
§ Salary Range: Negotiable depends on candidates’ experience
JOB DUTIES:
§ Report to Japanese Manager on client’s side
§ Assigned to Hardware Development Team with 2-4 members
§ Job Responsibilities:
- Designs and tests new integrated circuits and hardware components for a wide variety of signal processing applications and research
- Designs, documents, and develops code (to include firmware) for digital signal processors or other programmable hardware devices
- Analyzes the function of existing integrated circuits and hardware components for the purpose of reverse engineering the hardware and firmware
- Conducts the necessary hardware engineering and related functions to modify and adapt vendor-manufactured hardware to meet special needs and contingencies
JOB REQUIREMENTS:
§ Desirable Background & Experience:
- Qualification: Bachelor’s degree
- Language Skills: Japanese conversational level (N4) & English conversational level (TOEIC 500). Able to handle daily conversation & report discussion
- 3+ years’ working experience in hardware designers (LSI, FPGA logical design development)
- Can utilize Modelsim, UNIX, ISE, Quartus II development tools
- Can read a circuit diagram of LSI and FPGA
§ Desirable Character:
- Gender: Any
- Age: 22-35
- Personality: hardworking, patient, enthusiastic, active
Please kindly be noted that only shortlisted candidate will be approached. For further information about the job, please kindly contact us via our telephone No. of 028-3911-5800