Job Description
<Number of employees : Total: 450 Local: 443 Japanese: 7 10% Vietnamese on site in Japan> <Report Line: Vietnamese Technical Department Manager> <Team Member: 13 people> <Number of Subordinates: 12 people > <Products: Develop software for this company's systems and industrial solutions in the fields of Energy, Systems & Infrastructure Solutions, Electronics and Storage, and IoT Solutions for Industry> <Clients: Companies in this company's corporation > <Saturday Working: No > <Job Responsibilities> System LSI design and verification FPGA prototyping design and verification. Including: ・Propose development solution with customer. ・Propose architecture and solution to team. Review, control solution of members. ・Directing project team in essential work tasks of development (e.g requirement definition, design, implementation, testing/verification) ・In charge for success of the project in terms of Quality, Cost and Delivery. ・Communicate and discuss directly with customer about requirement specifications. ・In charge for continuously discovering, evaluating and implementing new technologies/process to optimize development efficiency or improve product quality.
Job Requirement
<Necessary Skill / Experience > ・Education: Bachelor's degree or equivalent in Information Technology, Computer Science, Electronics & Telecommunication or related fields. ・Age: 28 - 35 years old. ・Gender: Male Preferred ・Language: English conversational level (for internal communication, report to Japanese Manager when necessary, writing emails, understanding the documents in English) ・Experience: - At least 5 years working experience in LSI development. During which have at least 3 years in RTL design using Verilog-HDL/VHDL language. - At least 2 years management experience of at least 3-4 people ・Technical skills - Able to develop FPGA (RTL knowledge, using FPGA tools such as Vivado). Able to use VCS, a RTL simulator. Able to read/write Verilog and write test code (test bench in Verilog). - Experience in ESL/HLS using SystemC - Experience in RTL design using Verilog-HDL/VHDL language - Experience in Verification using SystemVerilog ・Software skills - C/C++ programming is an advantage - Basic skills and knowledge of Assembly programming skill <Personality/Personal attribution> ・Team working, open minded, long-term commitment & self-motivated. ・Very good inter-personal and communication skills with customers and project members. ・Adapt quickly with new domain, ready to work & study new technologies. ・Able to work under high pressure. <Schedule> ・Interview round: 2 rounds, both face to face. ・Interviewer: - 1st round: Vietnamese Technical Department Manager + Vietnamese HR (For technical discussion, work discussion,.. to decide if the candidate is suitable to the job) - 2nd round: Vietnamese HR (Discussion about salary, work benefits,... to decide if the company's and candidate's necessity are met) ・Test: No (Candidate will be tested language skills during the interview) ・Interview language: Vietnamese, English